/*
 * This file is part of the OpenMV project.
 *
 * Copyright (c) 2013-2020 Ibrahim Abdelkader <iabdalkader@openmv.io>
 * Copyright (c) 2013-2020 Kwabena W. Agyeman <kwagyeman@openmv.io>
 *
 * This work is licensed under the MIT license, see the file LICENSE for details.
 *
 * OV7690 register definitions.
 */
#ifndef __REG_REGS_H__
#define __REG_REGS_H__

#define GAIN    0x00
#define BGAIN   0x01
#define RGAIN   0x02
#define GGAIN   0x03
#define REG0C   0x0C
#define REG0E   0x0E
#define AECH    0x0F
#define AECL    0x10
#define CLKRC   0x11
#define REG12   0x12
#define REG13   0x13
#define REG14   0x14
#define REG15   0x15
#define REG19   0x19
#define PLL     0x29
#define REG3E   0x3E
#define REG82   0x82
#define LCC0    0x85
#define LCC1    0x86
#define LCC4    0x89
#define LCC5    0x8A
#define LCC6    0x8B
#define REGC8   0xC8
#define REGC9   0xC9
#define REGCA   0xCA
#define REGCB   0xCB
#define REGCC   0xCC
#define REGCD   0xCD
#define REGCE   0xCE
#define REGCF   0xCF
#define REGD2   0xD2
#define REGD8   0xD8
#define REGD9   0xD9

#endif //__REG_REGS_H__
